The AI and Advanced Architectures team is looking for hardware engineers to join us. We innovate using a mix of algorithmic innovation, custom hardware, and framework-level software that interfaces to the hardware. We're looking for a motivated hardware engineer to help extend our core hardware capability. Day to day tasks for this role may include the design and implementation of novel hardware devices to enable Microsoft’s business success. You'll need to be comfortable developing architectural specifications using careful HW/SW co-design. You will implement designs using Verilog and embedded processors and write the accompanying software to interface with and manage the hardware. You will need a background that includes computer science and computer system architecture design fundamentals.
We are a cross-discipline team of highly capable and motivated people in the new Azure Hardware Systems Group with a collaborative culture and a strong track record of delivering strategic impact to Microsoft. We have a proven history with Project Catapult of driving deployment of programmable hardware (FPGAs) to Microsoft data centers worldwide and we are looking to expand the scope of our impact.
Responsibilities
Specification, design, and validation of complex FPGA/ASIC designs
Qualifications
Required Qualifications: · B.S or higher in computer engineering, computer science, or related fields. · 3+ years experience with RTL development (Verilog / VHDL) and prototyping (FPGA / ASIC). · 1+ year experience with FPGA-based SOC HW & SW development tools such as Intel Platform Design or Xilinx Platform Studio · 2+ years experience in SoC/embedded systems programming experience in C/C++
Preferred Qualifications: · M.S. or PhD in EE, ECE, CE, CS or related fields. · Strong background in computer architecture, embedded systems. · 5+ years experience with EDA tools, FPGA SoC development (e.g., Intel Platform Designer, Xilinx Platform Studio) and embedded software development · 5+ years' experience with Verilog or VHDL and design floor planning, timing closure and IP integration on FPGAs · Demonstrated success in completing technically innovative hardware designs. · Strong communication skills and the desire to collaborate in a team of engineers.
#AzureAIArch
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. |
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.
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