Sr Member of Technical Staff
Intel CorporationSan joseUpdate time: January 30,2022
Job Description

We are a global leader, creating world-changing technology that enables progress and enriches lives. Intel is at the intersection of several technology inflections - artificial intelligence, 5G network transformation, and the rise of the intelligent edge- that together will shape the future of technology.


As a member of Intel's Programmable Solutions Group (PSG), you will use your experience of Logic Design, SOC architecture to lead efforts at a system level in enabling customers, both internal and external, to use the Structured ASIC technology.

 

The position requires a self-driven candidate with experience in design, verification and communication interfaces, coupled with good communication skills.

 

The Sr Member of Technical Staff- SOC Design Engineer will be responsible for, but not limited to:

  • Oversee definition, design, verification, Integration and documentation for SoC (System on a Chip) development.

  • Understand module interfaces/formats for Integration and building an SOC model for simulation and emulation.

  • Perform Logic design for integration of external and internal functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.

  • Contribute to the development of multidimensional designs involving the multiple dies on a package with product level build and simulation and verification.

  • Perform all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.

  • Review vendor capability to support development.

Structured ASIC team:

This is a structured ASIC team under Intel's PSG is targeting 5G, cloud computing and high-end consumer application space. Intel® eASIC™ devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs bridging the gap between FPGA and Custom ASIC.


Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education

  • Bachelors' degree in Electrical Engineering, Electrical Electronics, Computer Engineering, or related field

Minimum Qualifications

  • 15+ years of experience in the following:

  • Experience in RTL design for low power and testability.

  • Experience in RTL synthesis and DFT / MBIST insertion.

  • Interfacing with Physical Design team to support floor-planning, timing constraints, ECO.

  • SOC architecture, design flows and debug skills.

  • RTL design using Verilog/System Verilog.

  • High performance, digital logic designs and integration.

  • Front End RTL tools and design methodologies.

  • SOC level clocking, reset and power management.

  • Post-Si lab debug and power-on.

Preferred Qualifications

  • Masters' degree in Electrical Engineering, Electrical Electronics or Computer Engineering with 10+ years of experience.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, California, Santa Clara


Intel Corporation will require all new U.S. employees to be fully-vaccinated for Covid-19 as a condition of hire unless they have an approved accommodation in place under applicable law. Newly-hired employees will be required to provide proof of vaccination prior to their start date.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0198703San JoseProgrammable Solutions Group

Get email alerts for the latest"Sr Member of Technical Staff jobs in San jose"