Our Xeon Server Validation Team is seeking Performance and Power Validation Engineers to join us in our quest to ensure no bugs escape to our customers. We are comprised of engineers from a variety of life experiences and perspectives who share this common goal and pursue excellence in doing so. We value our people first and foremost, so we appreciate a We Over Me mentality and a spirit of collaboration and encouragement. We have a robust server roadmap to deliver and therefore need your passion for problem-solving and your expertise.
If you are technically curious and enjoy developing creative solutions to complex problems, then come join us in delivering the highest quality server products to the world with the highest performance and power efficiency in the world. In exchange we offer you the opportunity to collaborate closely with the brightest minds in the industry, and to be a part of the work influencing the technology data revolution. You will enjoy all the growth opportunities available to you at company as expansive and diversified as Intel.
Behavioral Skills We're Looking For:
A collaborative and helpful ambition.
Creativity, and deep problem solving acumen.
Excellent verbal, written, and interpersonal skills.
A growth mindset.
Collaboration and teaming skills.
Networking, communication and influence skills.
Must possess strong initiative, problem solving, communication skills and willing to work within a diverse team environment.
As an experienced Performance Validation Engineer, you will:
Create, define and develop performance validation and power validation methods and techniques, advancing the state of the art across all Intel products.
Write performance validation test SW and automation SW to measure and characterize the performance and power consumption of Intel's next generation of server products in a highly efficient manner.
Characterize and optimize performance and power management architectures against various workloads to improve performance, identify weaknesses, and help drive the direction of new power management ideas in next generation servers.
Analyze performance and power management results, collaborating with architecture and design teams to optimize to get the highest levels the performance and most efficient power consumption form Intel's Server SOC's.
Perform Si and platform debug to root-cause issues and enable robust design fixes; design experiments to root cause the issues and collaborate with other teams for debug.
Collaborate with SOC and IP architecture, design and pre-silicon validation teams in developing and improving post-silicon validation methodologies, test content, and validation techniques, to provide feedback for future on-die performance and power management debug features.
Test planning, execution monitoring, and reporting test results; drive schedules and issues to closure in high complex scenarios.
Collaborate with cross functional HW and SW team to solve complex issues and improve efficiency.
Make judgment calls regarding customer deliverables and program level risk assessment from a performance and power standpoint.
Engage with and help resolve customer issues regarding SOC and system performance.
Requires broad understanding of multiple system areas and CPU architecture and micro-architecture.
Qualifications
Educational experience listed below would be obtained through relevant schoolwork, internships, jobs and/or research experience.
Minimum Qualifications:
The candidate must possess either a BS in Electrical Engineering, Computer Engineering, Computer Science, or related field with 8+ years of experience
OR
MS in Electrical Engineering, Computer Engineering or related field with 5+ years of experience.
Debug skills
A developed understanding of Computer Architecture and CPU/SOC micro-architecture.
Experience with Python or C language programming.
CPU micro-architectural and/or high-speed bus protocol experience.
Preferred Qualifications:
Hands-on experience working with lab equipment, networks, interfaces, (e.g. JTAG, OSC, LA).
Familiarity with server or client-specific industry benchmarks and their application to measurement and competitive analyses of performance KPI's.
Fundamentals in power and performance architecture, tuning, performance bottleneck analysis, using performance counter monitors.
Experience in design verification or validation disciplines, system platform-level debug and root cause isolation methodology and tools.
Experience in System/platform-level debug and root cause isolation, methodology and tools (including Logic Analyzers, Protocol Analyzers, Oscilloscopes and Multimeters).
Experience with leading automation efforts planning execution and overseeing system validation activities.
Deep technical knowledge in performance and power management including understanding of architecture and microcode sufficient to understand potential power and performance impacts of changes.
Experience with on-SOC performance counters/measurement features.
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Other Locations
US, California, Santa Clara;US, Oregon, Hillsboro
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role
This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
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