Do you want to collaborate with the best minds in the world? Do you love the idea of directly impacting Intel's future CPU generations? Come intern with our team this summer!

In this internship, you will be working alongside a World-class SOC design team within the Xeon Engineering Group (XEG) delivering on next-generation Xeon products/IPs for Server markets.

Responsibilities may be quite diverse of a nonexempt technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.

Your responsibilities will include but not be limited to:

• Block-level floor planning
• Logic synthesis of design blocks
• Formal Equivalence Verification (FEV), Auto Place-and-Route (APR) using Synopsys ICC tools
• Timing verification using Synopsys Primetime
• Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for
• Manufacturability checks DFM
• Assist in the preparation of the layout design database for introduction to manufacturing

In addition to the qualifications listed below, the ideal candidate will also have the following:

• Excellent communication skills
• Teamwork skills
• Strong analytical skills
• Problem solving skills
• Willingness to work independently and at various levels of abstraction

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

The candidate must be pursuing a Master's Degree or PhD in Electrical or Computer Engineering, or related field.

Availability to commit to an on-site or virtual co-op over school break during the summer months.

6+ months of experience/coursework with:

• CMOS transistor level circuit fundamentals
• VLSI hardware design and programming

Preferred Qualifications:

3+ months experience in:

• RTL/Logic design Verilog, VCS, etc.
• Electronic Design Automation tools, flows and methodology
• ICCDP, Design Compiler, IC Compiler/ICC, Primetime, VCS, Verilog
• Layout cleanup expertise DRCs, density, etc.
• Circuit design
• Computer architecture
• TCL, Perl and/or C++ programming

Inside this Business Group

Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.

Other Locations

Virtual US

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$52,000.00-$147,000.00

Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here