ESIP develops and delivers PLL's and all High Speed SerDes's to Intel devices.

Team delivers state of the art technologies as 112G and higher Ethernet SerDes.

We're looking for engineers for SerDes PHY pre-silicon verification team located in Jerusalem.

Designs, develops, modifies and evaluates complex analog and mixed signal electronic parts, components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems.

Analyzes equipment to establish operating data.

Conducts experimental tests and evaluates results.

Applies and uses independent evaluation to selects components and equipment based on analysis of specifications and reliability.

Evaluates practical capability of vendor to support product development.

Qualifications

B. Sc. in Electrical Engineering with at least 4 semesters till graduation.

Analog blocks, Python and lab equipment knowledge is an advantage

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.