What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

THE ROLE:

DXIO (Distributed CrossBar IO) and CIT (Chiplet Interconnect Technology) team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. DXIO includes AMD Internal links for on-chip connection and Machine Learning, DXIO also supports multi-protocol high speed IO (PCIe/SATA/Ethernet). You'll be working with the global team Architects/Designers/DV to deliver DXIO/CIT IP and subsystem to SOC and focus on System level connections and verifications.

 

THE PERSON:

People who have the passion to work on leading edge technology, who have good communication skills will be successful in this role.

 

KEY RESPONSIBILITIES:

• Integrate DXIO/CIT IP and subsystem to SOC
• Closely work with Designers and Architects to ensure SOC level connections
• SOC level verification and technical support

 

PREFERRED EXPERIENCE:

• Major in EE, CS or related, 3+ years working experience
• Familiar with IC Design and Verification flow, good knowledge of Verilog, SystemVerilog and UVM
• Knowledge on script language like perl, python, ruby is a plus
• Experiences on digital logical design is a big plus
• Knowledge on High speed IO/PCIE is a plus
• Fluent vocal English for technical discussion among global team

 

ACADEMIC CREDENTIALS:

• Candidate is preferred to be MSEE with 1~3 years, or BSEE with minimum of 3-years’ experience in digital ASIC/SOC design verification.

 

LOCATION:

Shanghai

 

APPLY:

Email to bella.yu@amd.com

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Requisition Number: 79247 
Country: China State: Shanghai City: Shanghai 
Job Function: Design