Ideal Candidate Candidate is preferred to be MS EE with minimum of 1+ year, or BS EE with minimum of 3+ years experience in digital ASIC/SOC design verification. Can help manager to execute plans in projectwith high quality results.Strong communication capability in English is required. Your daily work such as... Work with global architecture and designers to get a full deep insight on the design under verification. Unit/Block/Cluster/Chip level state of the art verification, test bench setup/ma...

About Marvell Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world’s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system-level knowledge, Marvell's infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. At Marvell, you’ll see your ideas put to work, share in t...

While working closely with a global FW Architecture and Development team, establishing system architectures, FW architectures, modeling, and definition of reusable FW components. Extensive experience in SSD architectural development and modeling Extensive SSD architecture experience, including consumer, client and data center designs Experience with FW Architecture for embedded systems Experience with firmware development within an SoC development organization Strong software/firmware engineerin...

上海市 About Marvell Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world’s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system-level knowledge, Marvell's infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. At Marvell, you’ll see your ideas put to work, share ...

上海市 Become a member of a world-class analog design team in providing high performance analog and mixed mode circuits and IPs for leading data communications and networking products. Designers have opportunities to design high performance Serdes, analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Team members participate in circuit architecture, circuit i...

Experience routing impedance matched differential traces (i.e. PCIe, SATA, etc.) Experience with layout out and routing of DDR memory Good working knowledge/experience of Cadence Allegro tool Deep knowledge of PCB manufacturing, assembly and IPC standards Experience generating well organized manufacturing packages with fab and assembly drawings Experience with library symbol and footprint creation as well as database library administration Knowledge of signal and power integrity for good quality...

上海市 Marvell is looking for firmware engineers to part of a team which delivers complete SSD firmware solutions for our next generation Data Center products. In This Role, You Will You will have an enormous opportunity to make an impact on the design and implementation of leading edge SSD storage products. As a member of the team, you will participate in all phases of the firmware development life cycle. Capable of becoming a domain expert and lead and mentor other firmware engineers Responsible ...

上海市 Candidate will involve in the next generation of high speed communication, low power chip development. Candidate will focus on micro-architecture, RTL coding, verification and synthesis. Candidate will also take part in all aspect of the silicon development and work closely with engineers from different department to bring project from concept to production. Responsibilities including - Own and responsible for delivery of a specific unit on the chip - Write high performance and low power RTL...

Become a member of a world-class analog design team in providing high performance analog and mixed mode circuits for leading data communications and networking products. Designers have opportunities to design regulators, high performance analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Team members participate in circuit architecture, circuit implement...

Ideal Candidate Candidate is preferred to be MS EE with minimum of 1+ year, or BS EE with minimum of 5+ years experience in digital ASIC/SOC design verification. Can help manager to execute plans in projectwith high quality results.Strong communication capability in English is required. Your daily work such as... Work with global architecture and designers to get a full deep insight on the design under verification. Unit/Block/Cluster/Chip level state of the art verification, test bench setup/ma...

- Logic synthesis: including std. cell mapping, timing, power, and area optimization. - Physical implementation: including floorplan, power routing, placement, clock tree synthesis, routing, si fixing, drc fixing, timing closure, dfm, Flip Chip Routing ...etc. - Physical verification: including low power check, timing analysis, timing eco, xtalk analysis, power analysis, ESD analysis, EM analysis, DRC check, LVS check, ANT check, ERC check ...etc. - Tapeout: timing signoff, power signoff, design...

上海市 实习生 We are seeking for talented Analog Mixed Signal Integrated Circuit Designers with solid background and design skills who will be contributing in a team environment in the development of high-speed mixed-signal IPs. Tasks will include block level circuit design, physical layout, behavior modelling using Verilog-A or Verilog-AMS, and full chip verification in advanced CMOS and SiGe technologies. - Degrees in Electrical Engineering, Automatic Control, etc. with proven academic record. - Sel...

上海市 1. Define and architect next generation circuits, functions, features to meet or exceed performance specifications. 2. Design advanced analog/mixed-signal systems and circuits for storage products using CMOS and SiGe technologies. 3. Perform verification to achieve high design quality using advanced computer-aided design (CAD) and verification flow. 4. Oversee physical layout and design. Interface with design, layout and test engineers to support the entire development flows. 5. Debugging/tr...

Become a member of a world-class analog design team in providing high performance analog and mixed signal circuits for leading data communications and networking products. Designers have opportunities to design regulators, high performance analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Team members participate in circuit architecture, circuit impleme...

四川省 实习生 - Logic synthesis: including std. cell mapping, timing, power, and area optimization. - Physical implementation: including floorplan, power routing, placement, clock tree synthesis, routing, si fixing, drc fixing, timing closure, dfm, Flip Chip Routing ...etc. - Physical verification: including low power check, timing analysis, timing eco, xtalk analysis, power analysis, ESD analysis, EM analysis, DRC check, LVS check, ANT check, ERC check ...etc. - Tapeout: timing signoff, power signoff...

- IC design implementation from RTL to netlist including synthesis, timing constraint composing, timing eco, design for test - IC physical implementation from netlist to GDSII, including floorplanning, power grid implementation, place and route, clock tree synthesis, timing eco, design closure, flip-chip design - IC design verification including timing analysis, timing signoff, formal verification and low power verification. - IC physical verification including physical verification, crosstalk a...

上海市 Experience routing impedance matched differential traces (i.e. PCIe, SATA, etc.) Experience with layout out and routing of DDR memory Good working knowledge/experience of Cadence Allegro tool Deep knowledge of PCB manufacturing, assembly, and IPC standards Experience generating well-organized manufacturing packages with fab and assembly drawings Experience with library symbol and footprint creation as well as database library administration Knowledge of signal and power integrity for good qu...

Intern – Software/Firmware Engineer, SSD Job description Marvell is building the Firmware team in the SSD product development team. As an Intern Firmware Engineer, you will be responsible for design, implementation and verification. You will be contributing in one or more of the following domains: PCIe/NVMe/SATA, NAND, Manufacturing. We are an ambitious team within a multi-site, multi-cultural company. Marvell develops challenging products and a unique high tech environment that encourages conti...

Marvell is building the Firmware team in the SSD product development team. As a Director, Firmware, you will be responsible for managing a team responsible for design, implementation, verification and customer support. You will be contributing in one or more of the following domains: PCIe/NVMe/SATA, NAND, Caching, Performance, FTL, Infrastructure, and Manufacturing. We are an ambitious team within a multi-site, multi-cultural company. Marvell develops challenging products and a unique high tech ...

As a FW Simulation Engineer at Marvell, you will design, implement and maintain software intended to test SSD FW in a simulation environment. You are expected to work closely with FW developers, firmware architects, firmware test architects, system hardware design engineers, memory architecture engineers to develop the simulation models. Requirements: •A bachelor’s degree in computer science, electrical engineering, computer engineering, software engineering •You demonstrate excellent C/C++ and/...